FSM-based digital design using Verilog HDL / Peter Minns, Ian Elliott.
Material type:
- text
- unmediated
- volume
- 0470060700
- 9780470060704
- TK7885.7 .M56 2008
Item type | Current library | Call number | Status | Date due | Barcode | |
---|---|---|---|---|---|---|
Books - Printed | PERPUSTAKAAN GUNASAMA HAB PENDIDIKAN TINGGI PAGOH Main Library General | TK7885.7 .M56 2008 (Browse shelf(Opens below)) | Available | 1000211873 |
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TK7885.7 .L44 2000 VHDL Coding and logic synthesis with synopsys / | TK7885.7 .L54 2005 Designing digital computer systems with Verilog / | TK7885.7 .M42 2012 Beginning digital from a VHDL perspective / | TK7885.7 .M56 2008 FSM-based digital design using Verilog HDL / | TK7885.7 .M57 2007 Hardware verification with SystemVerilog : an object-oriented framework / | TK7885.7 .N38 1998 VHDL : analysis and modeling of digital systems / | TK7885.7 .N38 1998 VHDL : analysis and modeling of digital systems / |
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