TY  - BOOK
AU  - Huang,Shi-Yu
AU  - Cheng,Kwang-Ting
TI  - Formal equivalence checking and design debugging
SN  - 079238184X
AV  - TK7874  .H82 1998
PY  - 1998///
CY  - Boston
PB  - Kluwer Academic
KW  - Intergrated circuirts
KW  - Verification
KW  - Electronic circuit design
KW  - Data processing
KW  - Application specific integrated circuits
KW  - Design and construction
ER  -