000 01036cam a2200277 i 4500
001 u60475
003 SIRSI
005 20240619145119.0
008 110131 eng
020 _a052182866X
050 _aTK7885.7
_b.L54 2005
100 1 _aLilja, David J. ,
_eauthor
_9123858
245 1 0 _aDesigning digital computer systems with Verilog /
_cDavid J. Lilja and Sachin S. Sapatnekar.
264 1 _aCambridge :
_bCambridge University Press,
_c2005.
300 _a160 pages :
_billustrations ;
_c25 cm.
336 _atext
_btxt
_2rdacontent
337 _aunmediated
_bn
_2rdamedia
338 _avolume
_bnc
_2rdacarrier
596 _a1 3
650 0 _aVerilog (Computer hardware description language).
_9244
650 0 _aElectronic digital computers
_xDesign and construction.
_930481
700 1 _aSapatnekar, Sachin S.
_925434
907 _a.b10137592
_b07-11-22
_c15-03-18
998 _am
_b06-11-22
_cm
_da
_e-
_feng
_g
_h0
999 _c8093
_d8093