000 01081cam a2200301 i 4500
001 u86223
003 SIRSI
005 20240619145149.0
008 110131 eng
020 _a0470060700
020 _a9780470060704
050 _aTK7885.7
_b.M56 2008
100 1 _aMinns, Peter. ,
_eauthor
_9198245
245 1 0 _aFSM-based digital design using Verilog HDL /
_cPeter Minns, Ian Elliott.
264 1 _aChichester :
_bJohn Wiley,
_c2008.
300 _axiii, 391 pages :
_billustrations ;
_c26 cm.+
_e1 computer optical disc (4 3/4 in.).
336 _atext
_btxt
_2rdacontent
337 _aunmediated
_bn
_2rdamedia
338 _avolume
_bnc
_2rdacarrier
596 _a1 3
650 0 _aVerilog (Computer hardware description language).
_9244
650 0 _aDigital electronics.
_9487
650 0 _aSequential machine theory.
_93708
700 1 _aElliott, Ian D.
_9198246
907 _a.b10161314
_b07-11-22
_c15-03-18
998 _am
_b06-11-22
_cm
_da
_e-
_feng
_g
_h0
999 _c9380
_d9380